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IST - Department of Electrical and Computer Engineering

Instituto Superior Técnico, Technical University of Lisbon

INESC - Systems and Computers Research Institute

Av. Alves Redol, 9, 339A

1000 Lisboa, Portugal

Tel: (351) - 1 - 3100337

Fax: (351) - 1 - 3523401

Scientific Interests and Activity

Research in the areas of computer aided design of integrated circuits. Emphasis in the development of algorithms for parallel computation and in the theoretical and practical aspects related with numerical circuit and logic simulation for circuits and systems design problems.

Professional Experience

Instituto Superior Técnico (IST) (1/95 - present day), Lisboa, Portugal

Associate Professor, Electronics section, Department of Electrical and Computer Engineering, teaching courses in Simulation and Verification of Electronic Circuits and basic Electronics.

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Systems and Computers Research Institute (INESC) (1/95 - present day), Lisboa, Portugal

Research at INESC, member of the Optimization and Simulation Algorithms Group (ALGOS) and the Electronic Systems Design Automation Group (ESDA). Conducts research in the areas of Circuit Simulation, namely in numerical methods for the solution of high complexity problems, algorithms for extraction and modeling of interconnect and packaging structures in advanced technologies for electronic production.

Founding member and researcher of the Cadence European Laboratories

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Thinking Machines Corporation (TMC) (6/90 - 9/90), Cambridge, MA, E.U.A

Research in the are of numerical methods with application in massively parallel computer architectures and parallel algorithms for the simulation of integrated circuits dedicated to robotic vision. Development of a Connection Machine based circuit simulator, CMVSIM, optimized for the simulation of analog circuit mapped onto bi-dimensional arrays.

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Massachusetts Institute of Technology (MIT) (9/88 - 12/94), Cambridge, MA, E.U.A

Research Assistant in the VLSI­CAD Group of the Research Laboratory for Electronics (RLE). Developed research work in numerical algorithms for timing and circuit simulation, with emphasis to techniques applicable to parallel computer architectures.

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Instituto Superior Técnico (IST) (9/86 - 12/94), Lisboa, Portugal

Assistant/Lecture of the Electronics Section of the Department of Electrical and Computer Engineering.

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Systems and Computers Research Institute (INESC) (10/86 - 12/94), Lisboa, Portugal

Researcher at INESC, studied architectures and algorithms for parallel processing with emphasis on the application to problems in the area of computer simulation and verification of electronic circuits. Developedžin the context of European ESPRIT programsžaccelerated and parallel version of a timing simulation tool.

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European Center for Nuclear Research (CERN) (7/86 - 9/86), Geneve, Suiça

Summer student in the EP Division. Developed computer tools to be used in the design and verification of the Aleph experiment to be conducted in the particle accelerator LEP.

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Instituto Superior Técnico (IST) (10/85 - 10/86), Lisboa, Portugal

Teaching Assistant in the Electronics Section of the Department of Electrical and Computer Engineering.

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Instituto Superior Técnico (IST) (10/84 - 10/85), Lisboa, Portugal

Teaching Assistant in the Analysis and Algebra Section of the Mathematics Department.

Education, Academic Curriculum

Massachusetts Institute of Technology, Cambridge, MA, E.U.A

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Ph.D in Electrical Engineering and Computer Science, May 1994.

Thesis title: ``Model Order Reduction Algorithms for Circuit Simulation''.

Study of techniques and methodologies to allow the development of algorithmic of device models with reduced complexity for inclusion in circuit simulation tools. Study of guaranteed stable algorithms for interpolating data describing a device in the frequency domainžand generation of a numerical model that enables the simulation of such devices in the time domain.

Thesis adviser: Professor Jacob K. White.

Minor requirements in the area of Design of VLSI Circuits.

Courses Cumulative GPA: 5.0/5.0.

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S.M. in Electrical Engineering and Computer Science, June 1990

Thesis title: ``Circuit Simulation on Massively Parallel Processors''

Study of the various aspects involved in the development and implementation of a electrical circuit simulator in a massively parallel computer architecture. Development of a simulation environment for the design of integrated circuit arrays based on a bidimensional mapping with application in signal processing and robotic vision.

Thesis advisor: Professor Jacob K. White.

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E.E. in Electrical Engineering and Computer Science subsequently awarded in the same topic, September 1991.

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Instituto Superior Técnico, Lisboa, Portugal

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Master of Science in Electrical and Computer Engineering, August 1989

Implementation of an event-driven based electrical circuit simulator in an MIMD parallel computer architecture. Study of numerical integration algorithms based on exponential-fitting explicit methods, and asynchronous algorithms for the control of parallel simulation. Parallelism was researched both at the data and functional levels.

Thesis advisor: Professor Luís M. Vidigal.

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Licenciatura, summa cum laude (distinção e louvor) in Electrical and Computer Engineering, June 1986.

Five-year Curricula in Systems and Computers Engineering includes courses in VLSI Design, Control Theory, Operating Systems, Artificial Intelligence, Circuits and Signals Theory, Electronics, Applied Mathematics, Microcomputer-based Logic Design, Mathematical Analysis, Physics, Economics, etc.

Cumulative GPA: 19/20.

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Colégio Valsassina, Lisboa, Portugal

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12o ano, High School

Cumulative GPA: 19/20.

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High School Diploma.

Cumulative GPA: 18/20.

Publications

Books and Thesis

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Luís Miguel Silveira, "Circuit Simulation Algorithms for Massively Parallel Processors", Masters Thesis, Massachusetts Institute of Technology, May 1990.

Luís Miguel Silveira, "Model Order Reduction Techniques for Circuit Simulation", Phd Thesis, Massachusetts Institute of Technology, May 1994.

Luís Miguel Silveira, "Métodos Explícitos por Ajuste de Exponencial para Simulação Eléctrica de Circuitos em Arquitecturas Paralelas", Master's Thesis, Instituto Superior Técnico, Technical University of Lisbon, August 1989.

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Journal Articles

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João P. Costa, Mike Chou, L. Miguel Silveira, "Efficient Techniques for Accurate Modeling and Simulation of Substrate Coupling in Mixed-Signal IC's", IEEE Transactions on CAD, Vol. 18, No. 5, May 1999.

Luís Miguel Silveira, Ibrahim Elfadel, Mattan Kamon and Jacob K. White, "Coupled Circuit-Interconnect Analysis using Arnoldi-based Model Order Reduction", accepted for publication in the Special Issue of Computer Methods in Applied Mechanics and Engineering on Advances in Computational Methods in Electromagnetics, Vol. 169/3-4, pp. 377-389, February 1999..

Mattan Kamon, Nuno Marques, L. Miguel Silveira and Jacob White, "Automatic generation of Accurate Circuit Models of 3-D Interconnect", IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Part B: Advanced Packaging, 21(3):225-240, August 1998.

L. Miguel Silveira., "The critical path problem in timing verification", The INESC Journal on Research and Development, 5(2):36-72, December 1996.

Luís Miguel Silveira, Mattan Kamon, and Jacob K. White, "Efficient reduced-order modeling of frequency-dependent coupling inductances associated with 3-d interconnect structures", IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Part B: Advanced Packaging, 19(2):283-288, May 1996

Luís Miguel Silveira, Mattan Kamon, and Jacob K. White, "Algorithms for Coupled Transient Simulation of Circuits and Complicated 3-D Packaging" IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Part B: Advanced Packaging, 18(1):92-98, February 1995.

L. Miguel Silveira, Ibrahim M. Elfadel, Jacob K. White, Monirama Chilukuri and Kenneth Kundert, "Efficient Frequency-Domain Modeling and Circuit Simulation of Transmission Lines, IEEE Transactions on Components, Packaging, and Manufacturing Technology - Part B: Advanced Packaging, 17(4):505-513, November 1994.

Andrew Lumsdaine, L. Miguel Silveira, and Jacob K. White, "Massively Parallel Simulation Algorithms for Grid-Based Analog Signal Processors", IEEE Transactions on CAD, 12(11):1665-1678, November 1993.

L. Miguel Silveira, Jacob K. White Horácio C. Neto, and Luís M. Vidigal, "On Exponential Fitting for Circuit Simulation", IEEE Transactions on CAD, 11(5):566-574, May 1992.

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Articles in International Conference

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L.~Miguel Silveira and Nuno Vargas, "Multilevel finite difference methods for the characterization of substrate coupling in deep sub-micron designs", In XII Symposium on Integrated Circuits and Systems, Natal, RN, Brazil, September/October 1999.

Nuno Marques, Mattan Kamon, Jacob White, and L.~Miguel Silveira, "Improving the efficiency of parasitic extraction and simulation of 3d interconnect models", In ICECS'99 - IEEE International Conference on Electronics, Circuits and Systems, Pafos, Cyprus, September, 1999.

M.~Kamon, N.~Marques, Y.~Massoud, L.~Silveira, and J.~White, "Interconnect analysis: From 3-d structures to circuit models", Proceedings of the 36th$ Design Automation Conference, pages 910--914, New Orleans, Louisiana, June 1999.

Carlos P. Coelho, Joel R. Phillips and L. Miguel Silveira, "Robust Rational Function Approximation Algorithm for Model Generation", to appear in Proceedings of the 36th Design Automation Conference, New Orleans, Louisiana, U.S.A., June 1999.

Luís Guerra e Silva, Luís Miguel Silveira and João P. Marques-Silva, "Algorithms for Solving Boolean Satisfiability in Combinational Circuits", in Proceedings of the Design Automation and Test in Europe -- DATE'99, Munich, Germany, March 1999.

Joao Paulo Costa, Mike Chou, L. Miguel Silveira "Efficient Techniques for Accurate Extraction and Modeling of of Substrate Coupling in Mixed-Signal IC's", in Proceedings of the Design Automation and Test in Europe -- DATE'99, Munich, Germany, March 1999.

Luís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira and Karem Sakallah, "Timing Analysis Using Propositional Satisfiability", Proceedings of ICECS'98 - IEEE International Conference on Electronics, Circuits and Systems, LisbonžPortugal, September 1998.

Nuno Marques, Mattan Kamon, Jacob White and L. Miguel Silveira, "A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects", Proceedings of the Design Automation Conference, San Francisco, California, U.S.A., June 1998.

Luís Guerra e Silva, João P. Marques Silva, Luís Miguel Silveira and Karem Sakallah, "Realistic Delay Modeling in Satisfiability-Based Timing Analysis", Proceedings of the International Symposium on Circuits and Systems, Monterey, California, U.S.A, June 1998.

Joao Paulo Costa, Mike Chou, L. Miguel Silveira "Precorrected-DCT Techniques for Modeling and Simulation of Substrate Coupling in Mixed-Signal IC's", Proceedings of the International Symposium on Circuits and Systems, Monterey, California, U.S.A, June 1998.

Jess Chen, Joel Phillips, L. Miguel Silveira and Ken Kundert, "Modeling RF Circuits for Systems Analysis", Proceedings of the Cadence Technical Conference, San Antonio, Texas, May 1998.

Nuno Marques, Mattan Kamon, Jacob White and L. Miguel Silveira, "A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects", Proceedings of the Cadence Technical Conference, San Antonio, Texas, May 1998.

Nuno Marques, Mattan Kamon, L. Miguel Silveira, "An Efficient Algorithm for Fast Parasitic Extraction and Passive Order Reduction of 3D Interconnect Models", Proceedings of the Design Automation and Test in Europe -- DATE'98, Paris, France, February 1998.

Joao Paulo Costa, Mike Chou, L. Miguel Silveira "Efficient Techniques for Accurate Modeling and Simulation of Substrate Coupling in Mixed-Signal IC's", Proceedings of the Design Automation and Test in Europe -- DATE'98, Paris, France, February 1998.

Luís Guerra e Silva, João Marques Silva, Luís Miguel Silveira and Karem Sakallah, "Satisfiability Models and Algorithms for Circuit Delay Computation", in Proceedings of the ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Tau 1997", Austin, Texas, U.S.A., October 1997.

Mattan Kamon, Nuno Marques, L. Miguel Silveira and Jacob White, "Generating Reduced Order Models via PEEC for Capturing Skin and Proximity Effects", in Proceedings of the 6th Topical Meeting on Electrical Performance of Electronic Packaging, San Jose, California, October 1997.

L. Miguel Silveira and Mattan Kamon, "Algorithms for Efficient 3-D Interconnect Modeling and Coupled Circuit Simulation", European Conference on Circuit Theory and Design, Budapest, Hungary, September 1997.

L. Miguel Silveira and Mattan Kamon, "Coupled Circuit-Interconnect Modeling and Simulation", VLSI'97 IX IFIP International Conference on VLSI, Gramado, Rio Grande do Sul, Brasil, August 1997.

L. Miguel Silveira, Ibrahim Elfadel, Mattan Kamon and Jacob K. White, "A Coordinate-Transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of Arbitrary RLC Circuits", PIERS, Progress in Electromagnetics Research Symposium, Cambridge, MA, July 1997.

L. Miguel Silveira and Mattan Kamon, "Coupled Circuit-Interconnect Modeling and Simulation", Cadence Technical Conference, pages 83-88, Keystone, Colorado, May 1997.

L. Miguel Silveira, Mattan Kamon, Ibrahim Elfadel and Jacob K. White, "A Coordinate-Transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of Arbitrary RLC Circuits", International Conference on Computer Aided Design of IC, San Jose, CA, November 1996.

L. Miguel Silveira, Mattan Kamon, Ibrahim Elfadel and Jacob K. White, "Stable Reduced-Order Models of Generalized Dynamical Systems Using Coordinate-Transformed Arnoldi Algorithms", Copper Mountain Conference in Iterative Methods, Copper Mountain, CO, April 1996.

I. M. Elfadel, L. Miguel Silveira and J. White, "Stability Criteria for Arnoldi-Based Model Order Reduction", IEEE Conference on Acoustics, Speech, and Signal Processing (ICASSP'96), Atlanta, GA, May 1996.

L. Miguel Silveira, Mattan Kamon, and Jacob K. White, "Direct computation of reduced-order models for circuit simulation of 3-d interconnect structures.", invited presentation, in Proceedings of PIERS, Progress in Electromagnetics Research Symposium Conference, Seattle, WA, July 1995.

L. Miguel Silveira, Mattan Kamon, and Jacob K. White, "Efficient reduced-order modeling of frequency-dependent coupling inductances associated with 3-d interconnect structures", in Proceedings of the 32nd Design Automation Conference, pages 376-380, San Francisco, CA, June 1995.

L. Miguel Silveira, Mattan Kamon, and Jacob K. White, "Efficent reduced-order modeling of frequency-dependent coupling inductances associated with 3-d interconnect structures", in Proceedings of the European Design and Test Conference, Paris, France, March 1995.

L. Miguel Silveira, Mattan Kamon, and Jacob K. White, "Direct Computation of Reduced Order Models for Circuit Simulation of 3-D Interconnect Structures", in Proceedings of the 3rd Topical Meeting on Electrical Performance of Electronic Packaging, pages 245-248, Monterey, California, November 1994.

L. Miguel Silveira, Mattan Kamon, and Jacob K. White, "Algorithms for Coupled Transient Simulation of Circuits and Complicated 3-D Packaging", in Proceedings of the 44st Electronics Components and Technology Conference, pages 962-970, Washington, DC, May 1994.

L. Miguel Silveira, Ibrahim M. Elfadel, Jacob K. White, Monirama Chilukura, and Kenneth S Kundert, "Efficient Frequency-Domain Modeling and Circuit Simulation of Transmission Lines", in Proceedings of the 31st Design Automation Conference, pages 634-639, San Diego, CA, June 1994.

L. Miguel Silveira, Ibrahim M. Elfadel, and Jacob K. White, "A Guaranteed Stable Order Reduction Algorithm for Packaging and Interconnect Simulation", in Proceedings of the Topical Meeting on Electrical Performance of Electronic Packaging, pp. 165-168, Monterey, California, October 1993.

L. Miguel Silveira, Jacob K. White, and Steven Leeb, "A Modified Envelope-Following Approach to Clocked Analog Circuit Simulation", in International Conference on Computer Aided-Design, pp. 20-23, Santa Clara, California, November 1991.

L. Miguel Silveira, Andrew Lumsdaine, and Jacob K. White, "Parallel Simulation Algorithms for Grid-Based Analog Signal Processors", in International Conference on Computer Aided-Design, pp. 442-445, Santa Clara, California, November 1990.

Horácio C. Neto, L. Miguel Silveira, Jacob K. White, and Luís M. Vidigal, "On Exponential Fitting for Circuit Simulation", in International Symposium on Circuits and Systems, pp. 514-518, New Orleans, Louisiana, May 1990.

Arlindo L. Oliveira, Fernando Coito, Luís M. Silveira, Joao M. Lemos, Jorge S. Marques, "A microprocessor implementation of self-tunning controllers", in 2nd IFAC Symposium on Adaptive Systems and Control and Signal Processing, Lund, Sweden, June 1986.

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Articles in National Conferences and Workshops

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Luís Miguel Silveira, José Grácio, and Pedro Veiga, "Palprog - uma ferramenta software para agregados lógicos programaveis", in 2o Simposio de Electrónica das Telecomunicações, Lisboa, Portugal, May 1986.

J. Franca, S. Santos, P. Bicudo, and L. M. Silveira. "Novos circuitos e sistemas avançados de condensadores comutados para telecomunicações", in 2o Simposio de Electrónica das Telecomunicações, Lisboa, Portugal, May 1986.

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Reports

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M. Silveira, A. Lumsdaine, and J. White, "SIMLAB Users' Guide", Technical Report 588, Research Laboratory of Electronics, Massachusetts Institute of Technology, December 1994.

A. Lumsdaine, M. Silveira, and J. White, "SIMLAB Programmer's Guide", Technical Report 589, Research Laboratory of Electronics, Massachusetts Institute of Technology, December 1994.

A. Lumsdaine, M. Silveira, and J. White, "CMVSIM Users' Guide", Technical Report 590, Research Laboratory of Electronics, Massachusetts Institute of Technology, December 1994.

A. Lumsdaine, M. Silveira, and J. White, "CMVSIM Programmer's Guide", Research Laboratory of Electronics, Massachusetts Institute of Technology, 1990.

L. Miguel Silveira, J. White, Horácio Neto, and Luís Vidigal, "On Exponential Fitting for Circuit Simulation", Technical report, Microsystems Technology Laboratories VLSI Memo 90-593, Massachusetts Institute of Technology, June 1990.

Luís Miguel Silveira, "A Parallel Band-Matrix Solver for a Circuit Simulation Problem", Internal Report, Massachusetts Institute of Technology and Thinking Machines Corporation, December 1988.

Luís Miguel Silveira and Joao Paulo Silva, " Parallel Circuit Simulation: Preliminary Results", Technical report, Esprit 1058 Report, January 1989.

Luís Miguel Silveira, "A Static Partitioning Tool for Circuit Simulation", Technical report, Esprit 1058 Report, March 1987.

Luis Miguel Silveira, "Multiprocessor Implementation of an event-driven Circuit Simulator: Evaluation of Design Options", Technical report, Esprit 1058 Report, July 1987.

Luis Miguel Silveira, "Study of Multiprocessor Architectures for a Hardware Accelerator", Technical report, Esprit 1058 Report, January 1987.

Awards

IBM Electronic Design Automation Graduate Fellow (9/91-6/94).